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Verilog-Perl – Perl modules for interacting with Verilog code

Posted in Hardware Engineering, Links, Perl, Technology by engtech on May 23, 2006

 Verilog-Perl is a collection of perl modules for interacting with Verilog code. I haven't given it much of a look as of yet, but if "vpm" and "vppp" work as the synopsis advertises then it may have some utility. Especially if it can already correctly parse SystemVerilog.

  • Verilog::Getopt parses command line options similar to C++ and Vcs.
  • Verilog::Language knows the language keywords and parses numbers.
  • Verilog::Netlist builds netlists out of Verilog files. This allows easy scripts to determine things such as the hiearchy of modules.
  • Verilog::Parser invokes callbacks for language tokens.
  • Verilog::Preproc preprocesses the language, and allows reading post-processed files right from Perl without temporary files.
  • Vpm preprocesses warnings and assertions for any simulator.
  • vppp preprocesses the complete Verilog 2001 and SystemVerilog language.
  • Vrename renames and cross-refrences Verilog symbols.

Verilog-Perl

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  1. //engtech » Creating HTML documentation of Verilog code said, on July 05, 2006 at 7:28 pm

    [...] The parser can be used as a stand-alone perl module, and could be a useful tool for building custom scripts. Not to be confused with Verilog-Perl, another Verilog parser that supports SystemVerilog. [...]

  2. Ravi said, on April 12, 2007 at 4:55 pm

    It is nice to see output of v2html, but wont it be nice to have data flow information also in documentation. Well check it out http://vlsi.cs.iitm.ernet.in/veriviz/index.html
    It generate dfgs for input online. No installation no plugin, just paste and click.
    Enjoy:)

  3. engtech said, on April 15, 2007 at 8:44 pm

    Pretty cool Ravi.

    I’m looking forward to seeing the offline version. Being able to slurp in large million gate asics is where a visualization tool starts earning its keep.


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